1. Field of the Invention
This invention is related to the field of processors and, more particularly, to dispatching instructions in processors.
2. Description of the Related Art
A processor is generally hardware circuitry designed to execute the instructions defined in a particular instruction set architecture implemented by the processor. A sequence of instructions as defined in the instruction set architecture can be provided to the processor to implement desired functionality in a system that includes the processor. Accordingly, the performance of the system is at least partially dependent on the rate at which the processor can successfully execute the instructions in the sequence.
The rate at which instructions are executed can be increased by designing the processor to operate at high clock rates, where the clock is the signal which controls the capture and launch of digital signals in the processor circuitry. Additionally, by providing parallel pipelines in the processor circuitry, multiple instructions can be processed concurrently. To supply a large number of parallel pipelines (a “wide issue” processor), a relatively large number of instructions need to be fetched and prepared for execution each clock cycle (on average). The challenges related to locating large numbers of instructions quickly can put pressure on the ability to maintain a high clock cycle rate (or frequency).